The rapid and efficient transfer of information between a graphics device and system memory has been and will continue to be one of the most challenging tasks faced by computer system component designers. Through the years, different interface protocols have been used to accomplish these transfers. Several years ago, the Peripheral Component Interconnect (PCI) bus was a commonly used implementation to couple graphics devices to memory controllers. As graphics memory bandwidth requirements increased, the Accelerated Graphics Port (AGP) specification was created and adopted by a large segment of the computer industry.
One of the main advantages of the AGP implementations is the ability of the graphics device to view a large, contiguous graphics memory space where multi-megabyte textures, bitmaps, and graphics commands are stored. A graphics address remapping table is used to generate addresses to system memory from graphics memory addresses. There is no actual memory behind the graphics memory space, but the graphics address remapping table and associated translation circuitry provides access to actual system memory pages that may be scattered throughout the system memory.
Graphics memory bandwidth requirements continue to increase, and faster interconnect technologies are being developed to keep ahead of the growing requirements. One such interconnect technology is based on the PCI Express specification (PCI Express Base Specification, revision 1.0a). It would be desirable to provide a large, contiguous, graphics memory space for use with these emerging interconnect technologies.